The present invention relates to a motor drive apparatus and a motor drive method capable of reducing noise by limiting a current peak value to a predetermined value or less and by smoothing the waveforms of drive currents during the current limitation.
FIG. 15 is a view showing the configuration of a conventional motor drive apparatus for providing overcurrent protection. The operation of the conventional motor drive apparatus will be described briefly referring to FIG. 15. A power supply unit 20 carries out switching operation depending on control signals coming from a drive circuit 400 and supplies power from a DC power supply 1 to a motor 5. The current flowing through the power supply unit 20 is detected by measuring the voltage across both terminals of a current detection resistor (shunt resistor) 100.
The current detection signal detected using the current detection resistor 100 is filtered using a filter comprising a resistor 61 and a capacitor 62 and input to a comparator 65. A signal indicating the divided voltage value obtained by dividing a reference voltage Vref using resistors 63 and 64 is input to the reference input terminal of the comparator 65. When the output of the filter rises to the above-mentioned divided voltage value or more, an overcurrent protection circuit 66 turns OFF all of the high-side drive transistors 21, 22 and 23 and the low-side drive transistors 25, 26 and 27 of the power supply unit 20, thereby shutting off the output and carrying out overcurrent protection.
The technology for carrying out overcurrent protection operation by filtering the current detection signal detected using the current detection resistor and by comparing the signal with the reference voltage as described above has been disclosed in, for example, International Publication Number WO 00/19591.
FIG. 16 is a view showing the configuration of another conventional motor drive apparatus equipped with an overcurrent protection function. The operation of the other conventional motor drive apparatus will be described briefly referring to FIG. 16. An overcurrent detection circuit 80 compares the current detection signal detected using a current detection resistor 100 with a reference voltage Vref. Upon detecting that the current detection signal has become higher than the reference voltage Vref, the overcurrent detection circuit 80 outputs an overcurrent detection signal to a flip-flop circuit 92. The overcurrent detection signal and a signal obtained by differentiating a pulse width modulation signal (PWM signal) output from a pulse width modulation circuit (PWM circuit) 90 using a differentiation circuit 91 are input to the flip-flop circuit 92. The flip-flop circuit 92 outputs a pulse signal synchronized with the PWM signal to an AND circuit 93. The AND circuit 93 ANDs the PWM signal output from the PWM circuit 90 and the pulse signal output from the flip-flop circuit 92 and outputs the result of the AND operation to a drive circuit 400. The drive circuit 400 shuts off the output of the motor drive apparatus depending on the output of the AND circuit 93, thereby carrying out overcurrent protection.
FIGS. 17A to 17E are timing charts illustrating the operation of the overcurrent protection in the conventional motor drive apparatus shown in FIG. 16. FIG. 17A shows the waveform of the PWM signal, FIG. 17B shows the waveform of the output signal of the differentiation circuit 91, FIG. 17C shows the waveform of the output signal of the overcurrent detection circuit 80, FIG. 17D shows the waveform of the output signal of the flip-flop circuit 92, and FIG. 17E shows the waveform of the detection current detected using the current detection resistor 100. The differentiation circuit 91 outputs pulses synchronized with the rising edges of the PWM signal of the PWM circuit 90. The detection current detected using the current detection resistor 100 increases during the ON period following the rising edge of the PWM signal. Upon detecting that the detection current has reached the current limit level, the overcurrent detection circuit 80 outputs a pulse. The flip-flop circuit 92 outputs a pulse signal that is set by the pulse output from the differentiation circuit 91 and reset by the pulse output from the overcurrent detection circuit 80 to the drive circuit 400. The output of the motor drive apparatus is shut off depending on this pulse signal, and overcurrent protection is performed. In other words, when the overcurrent detection circuit 80 detects an overcurrent, the conventional motor drive apparatus shown in FIG. 16 shuts off its output until the next rising edge of the PWM signal, whereby overcurrent protection operation is performed for each PWM cycle.
The technology in which the overcurrent protection operation is performed in synchronization with the PWM signal as described above has been disclosed in, for example, Japanese Patent Application Laid-Open Publication No. H 04-285427.
However, the conventional configuration (for example, International Publication Number WO 00/19591) described above and shown in FIG. 15 has the following problems.
The current detection signal includes high-frequency switching noise because of the effect of the high-frequency switching operation due to the pulse width modulation drive (PWM drive). In the above-mentioned conventional configuration comprising the filter, although the high-frequency switching noise can be eliminated by filtering, there is a fear of eliminating instantaneous overcurrent other than the high-frequency switching noise as noise. In other words, there is a fear that overcurrent detection accuracy lowers depending on the setting of the filtering constant. Furthermore, additional components, such as a resistor and a capacitor, constituting the filter are necessary separately. When an overcurrent is detected, all of the high-side drive transistors and the low-side drive transistors are turned OFF, whereby the output is shut off to perform overcurrent protection. For this reason, the decrease amounts of the drive currents during the shutoff of the output are very large and current ripples increase. As the current ripples increase, disturbances occur in the waveforms of the drive currents. Consequently, there is a problem that motor drive noise increases owing to the disturbances occurred in the waveforms of the drive currents when the overcurrent protection is performed as described above.
In addition, when the output is shut off in the conventional configuration, all the currents having been flowing to the motor side until that moment are regenerated to the power supply side. As a result, there is a fear that the power supply voltage is raised by the regenerated currents depending on the capability of the power supply and that the power supply voltage rises to the rated value or more in some cases. For this reason, in the conventional configuration, there is a fear of degrading or damaging devices, such as the drive transistors, although current limitation is performed. Furthermore, there is a problem of generating noise owing to the rising in power supply voltage.
In addition, the conventional configuration shown in FIG. 16 (for example, Japanese Patent Application Laid-Open Publication No. H 04-285427) has the following problems. Since the operation exiting from the overcurrent protection state is synchronized with the PWM signal, the waveforms of the drive currents during the overcurrent protection operation are susceptible to the PWM frequency. More specifically, as shown in FIGS. 17A to 17E, in particular, as the PWM frequency is lower (PWM frequency f1>f2), the PWM OFF period becomes longer (the period indicated by “X” in FIGS. 17A to 17E) in some cases, and the current ripples Ir in the waveforms of the drive currents increase accordingly. Furthermore, if the decrease amounts of the currents are large and abrupt current changes occur, this results in a problem of increasing noise.
FIGS. 18A to 18D are timing charts illustrating the operation of the conventional motor drive apparatus shown in FIG. 16 in the case that PWM drive is carried out while the PWM frequency is set constant. FIG. 18A shows the ON-timing of the PWM frequency being held constant, FIG. 18B shows the waveform of the output signal (overcurrent detection signal) of the overcurrent detection circuit 80, FIG. 18C shows the waveform of the PWM signal, and FIG. 18D shows the waveform of the detection current.
When PWM drive is carried out while the PWM frequency is set constant as shown in FIG. 18A, the PWM frequency becomes substantially lower than the setup frequency (owing to switching failure) in some cases depending on the timing of overcurrent detection. As a result, the PWM frequency having lowered is within the audible frequency range in some cases. More specifically, when the timing at which the detection current reaches the current limit level is immediately before the ON-timing of the PWM signal as shown at the time point indicated by arrow “A” in FIGS. 18A to 18D, the period to the next ON-timing of the PWM signal becomes short. As a result, the next overcurrent protection period (OFF period) becomes short. Consequently, the timing at which the detection current reaches the current limit level next time comes soon as shown at the time point indicated by arrow “B”, and the OFF period (T1off) for overcurrent protection becomes longer. If the OFF period becomes longer, the timing at which the detection current reaches the current limit level next time passes the next ON-timing of the PWM signal, just like the time points indicated by arrows “C” and “D”. As a result, the PWM cycle becomes longer (T1<T2), and the PWM frequency is lowered substantially. For example, if switching failure occurs once when PWM drive is carried out at a PWM frequency of 25 kHz, the substantial PWM frequency is 12.5 kHz. Consequently, the switching operation for the overcurrent protection is performed within the audible frequency range, and noise becomes larger. In addition, since the current ripples Ir also become larger, the waveforms of the drive currents are disturbed, and noise becomes larger. For these reasons, in the conventional configuration shown in FIG. 16 (for example, Japanese Patent Application Laid-Open Publication No. H 04-285427), as the current ripples in the waveforms of the drive currents increase, the waveforms of the drive currents are disturbed, and the PWM frequency is within the audible frequency range in some cases. Eventually, there is a problem of increasing noise during the overcurrent protection operation.